Variant Calling Parallelization on Processor-in-Memory Architecture
Dominique D. Lavenier, Remy Cimadomo, Romaric Jodin
The paper introduces a PIM architecture to accelerate variant calling by reducing data movement and energy consumption, achieving significant speed-up and cost savings compared to software, FPGA, and GPU solutions.
bioRxiv · Nov 3, 2020 · PreprintBioinformatics