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A canonical cortical electronic circuit for neuromorphic intelligence

Maryada MaryadaiD, Chiara De LucaiD, Arianna RubinoiD, Chenxi WeniD, Matteo CartigliaiD, Ioan-Iustin Fodorut, Melika PayvandiD, Giacomo IndiveriiD

Abstract

Cortical microcircuits play a fundamental role in natural intelligence. While they inspired a wide range neural computation models and artificial intelligence algorithms, few attempts have been made to directly emulate them with an electronic computational substrate that uses the same physics of computation. Here we present a heterogeneous canonical microcircuit architecture compatible with analog neuromorphic electronic circuits that faithfully reproduce the properties of real synapses and neurons. The architecture comprises populations of interacting excitatory and inhibitory neurons, disinhibition pathways, and spike-driven multi-compartment dendritic learning mechanisms. By co-designing the computational model with its neuromorphic hardware implementation, we developed a neural processing system that can perform complex signal processing functions, learning, and classification tasks robustly and reliably, despite the inherent variability of the analog circuits, using ultra-low power energy consumption features comparable to those of their biological counterparts. We demonstrate how both the model architecture and its hardware implementation seamlessly capture the hallmarks of neural computation: attractor dynamics, adaptation, winner-take-all behavior, and resilience to variability, within a compact, low-power computing substrate. We validate the models learning performance both from the algorithmic perspective and with detailed electronic circuit simulation experiments and characterize its robustness to noise. Our results illustrate how local, biologically plausible rules for plasticity and gating can overcome challenges like catastrophic forgetting and parameter variability, enabling effective always-on adaptation. Beyond offering insights into the nature of computation in neural systems, our approach introduces a foundation for ultra-low power, fault-tolerant architectures capable of complex signal processing at the edge. By embracing -rather than mitigating-variability, these neuromorphic circuits exhibit a powerful synergy with emerging memory technologies, suggesting a new paradigm for sophisticated "in-memory" computing. Through such tight integration of neuroscience principles and analog circuit design, we pave the way toward a class of brain-inspired processors that can learn continuously and respond dynamically to real-world inputs.

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